Original Comment

Hola.

What are your thoughts on the article about the memory configuration of Navi12? Will they use GDDR6 in a 256-bit configuration or HBM? (German, but you can just put it in google translate)

Thanks for the comment and the info that it came with it. I ‘ve been very busy in the last days,

I doubt that AMD is going to use an HBM configuration in any of the RDNA cards with a single one exception. The one that they are going to release for the HPC market in the future.

GDDR6 is different than the old GDDR memories, it has 2 channels per die, this means that we have two channels of 16 bits per chip and because of this we need an interface per channel.

Well, it seems that Navi 12 has 16 interfaces, this means that it is another 256 bit bus like Navi 10 (RX 5700). Then we can conclude that AMD is doing with RDNA the same that Nvidia did with Turing, remember that the full TU106 (RTX 2070) and the TU104 are GPUs with different configuration but with the same memory configuration.

About Navi12, 3DCenter says:

AMD Navi 12

  • High end version of Navi, likely resulting in the Radeon RX 5800 series
  • Possibly between 3328 and 4096 shader units (source: own acceptance)
  • Apparently 256 bit (GDDR6) memory interface (Source: 3DCenter-Forum)
  • Driver code has slight differences to Navi 10, ergo technologically probably something newer than the first Navi chip

My theory is that Navi12 and Navi14 are newer designs than Navi10.

Do you remember what happened with GCN 1.0 (Southern Islands) and GCN 1.1 (Sea Islands). The later was an improvement of the first that was made for console and PC APUs of the era (Kaveri, Kryptos and Liverpool). In the PC market one year after AMD released the RX 7xx0 series they put a card named RX 7790 that used a GPU named Bonaire, it was almost the same GPU than the Xbox One without the custom parts (including ESRAM) and with a GDDR5 interface.

In the RDNA whitepaper they make clear that they have more advanced RDNA designs, for example RX 5700 can only do SIMD within a register upto FP16 but we know that some designs support lower precision ops and a few new instructions.

This means like Sea Islands ISA was an expansion of the Southern Islands ISA then we can be in front of the RDNA 1.1 architecture in the case of Navi 12 and Navi 14. Why I say both? Well… I believe that the configuration of Navi 12 is going to be 2X Navi 14 and we know the configuration of it. In other words, 24 CUs/12 WGP for the Navi 14 and 48 CUs/24 WGP for the Navi 12.

I can add some extra things. Navi12 seems to have instructions related ray tracing, using the new image paths disclosed in the whitepaper. So if they have special units for intersection, that makes it next-generation Navi? (I’d also like to note, the patent says it still can have fixed-function traversal, but it can be bypassed where necessary and only use the intersection accelerators).
https://github.com/llvm-mirror/llvm/commit/eaed96ae3e5c8a17350821ae39318c70200adaf0#diff-779f5f88afd691030e4189856730b76cR25

The intesection unit just calculates if the ray intersects with the primitive but it didn’t traverse the BVH. Then we need another unit for traversing the BVH, in the case of the RT Core of Turing it includes both types of units and we don’t know if RDNA with RT Support will include both but… Do you know where the complete RT unit is in the case of Turing? is the direct neighbour of the texture unit.

Some pundits are talking about the ray tracing in AMD being inferior to the Nvidia solution only because the patent talks in generar about traversal using the shader units, but it seems that the same patent informs about the fixed function traversal unit. I am sure that AMD will go to the full solution instead of the partial one, it will be fun to see all the Astrotufers crying when the AMD solution will go to vs toe against Turing.

Do you believe that AMD is happy with the Navi 10/RX 5700 performance? No, they are not, and the reason is that it exists a gap between Pascal Performance and Turing Performance that they want to cross. Navi 10/RX 5700 was designed to surpass the performance of Pascal (GTX 1080) but it is bit worse than the RTX 2070, they want to tie atleast. In other words, Navi 12 and Navi 14 could be a little better than Navi 10 and it seems that in a few monthts we could have the first AMD GPU with Ray tracing support going directly to compete against the RTX 2080 series.

Also, Navi12 does not appear to have the ldsmisaligned bug in workgroup mode. I believe you’ve mentioned it before, but isn’t this part good for RT in the texture units? According to the ISA , the texture units and ALUs get more bandwidth (chap 10.3) . Of course, this could be a coincidence. In what mode are the rays submited, in what mode are they traversed?
https://github.com/llvm-mirror/llvm/blob/eaed96ae3e5c8a17350821ae39318c70200adaf0/lib/Target/AMDGPU/AMDGPU.td#L142
https://gpuopen.com/wp-content/uploads/2019/08/RDNA_Shader_ISA_7July2019.pdf

This is another direct confirmation that Navi 12 has got ray tracing units.

Was ML denoising the final part to make RT viable for Navi12? They’re receiving praise from Microsoft, and they also have those new units for fp16 and int8.
https://community.amd.com/community/radeon-pro-graphics/blog/2019/07/30/radeon-prorender-at-siggraph-2019-new-integrations-updated-plug-ins-full-spectrum-rendering-availability-and-more

Yes, I talked about it before. In this same post, the ALUs are now going to be able to subdivide the ALU beyond the FP16 and being able to do operations with Int8 and Int4 precisión.

So with all this in mind, is Navi12 bigger than Navi10?
(You can respond in Spanish)

Of course that it is going to be bigger if we take the last information that you gave to me as a source. The total size? About the size of Vega 20… more than 300mm^2 but less than 350mm^2.

Then it is the MI-Next.

Thanks for all the info.